Method of forming an etch indicator layer for reducing etch non-uniformities

ABSTRACT

By incorporating an etch control material after the formation of a material layer to be patterned, an appropriate material having a highly distinctive radiation wavelength may be used for generating a distinctive endpoint detection signal during an etch process. Advantageously, the material may be incorporated by ion implantation which provides reduced non-uniformity compared to etch non-uniformities, while the implantation process provides the potential for introducing even very “exotic” implantation species. In some embodiments, the substrate-to-substrate uniformity of the patterning of dual damascene structures may be increased.

BACKGROUND OF THE INVENTION

1. Field of the Invention

Generally, the subject matter disclosed herein relates to themanufacturing of integrated circuits, and, more particularly, toadvanced etch processes for patterning substantially homogeneousmaterials to a target depth, such as advanced trench etch processes inthe dual in-laid technique and the like.

2. Description of the Related Art

In modern integrated circuits, minimum feature sizes, such as thechannel length of field effect transistors, have reached the deepsub-micron range, thereby steadily increasing performance of thesecircuits in terms of speed and power consumption. As the size of theindividual circuit elements is significantly reduced, thereby improving,for example, the switching speed of transistor elements, the availablefloor space for the various components, such as drain and sourceregions, gate electrodes of transistors and interconnect lineselectrically connecting the individual circuit elements, is alsodecreased. Consequently, the dimensions of these components have to bereduced to compensate for a reduced amount of available floor space andfor an increased number of circuit elements provided per chip. Oneprominent example in this respect are metal lines and vias provided inthe wiring levels of integrated circuits. In integrated circuits havingminimum dimensions of approximately 0.35 μm and less, a limiting factorof device performance is the signal propagation delay caused by theswitching speed of the involved transistor elements. As the channellength of these elements has reached 0.18 μm and less, it turns out,however, that the signal propagation delay is no longer limited by thefield effect transistors but is limited, owing to the increased circuitdensity, by the close proximity of the metal lines in the wiring levels,since the line-to-line capacitance is increased in combination with areduced conductivity of the lines due to a reduced cross-sectional area.The parasitic RC (resistance/capacitance) time constants therefore mayrequire the introduction of a new type of dielectric material,preferably in combination with a highly conductive metal.

Traditionally, metallization layers are formed by a dielectric layerstack including, for example, silicon dioxide and/or silicon nitride,with aluminum as the typical metal. Since aluminum exhibits significantelectromigration at higher current densities, in highly sophisticatedintegrated circuits, aluminum is commonly replaced by copper, having asignificantly lower electrical resistance and a higher resistivityagainst electromigration. Moreover, the well-established and well-knowndielectric materials silicon dioxide (k≈4.2) and silicon nitride (k>5)are increasingly replaced by low-k materials to reduce the parasiticcapacitance. However, the transition from the well-known andwell-established aluminum/silicon dioxide metallization layer to a low-kdielectric/copper metallization layer is associated with a plurality ofissues to be dealt with.

For example, copper may not be deposited in higher amounts in anefficient manner by well-established deposition methods, such aschemical and physical vapor deposition. Moreover, copper may not beefficiently patterned by well-established anisotropic etch processes.Consequently the so-called in-laid or damascene technique is employed informing metallization layers including copper-containing lines.Typically, in the damascene technique, the dielectric layer is depositedand then patterned with trenches and vias that are subsequently filledwith a metal by plating methods, such as electroplating or electrolessplating. For forming vias providing electrical connection from anoverlying metal line to an underlying metal line of a lowermetallization layer, the vias and the trenches may be filled in a singleprocess so that the via and the trench have to be patterned prior tofilling in the copper. A corresponding technique, also referred to asdual damascene technique, is carried out for a conventional dielectriclayer stack by providing a silicon dioxide layer and an intermediatesilicon nitride layer that acts as an etch stop layer for the trenchetch and a second silicon dioxide layer formed thereon. Prior to orafter the trench etch process, a via may be etched in the lower siliconlayer, depending on the specific process strategy. In any case, thetrench etch process may be reliably controlled on the basis of theintermediate etch stop layer.

When replacing the high-k material silicon dioxide by a low-k material,the situation in forming the via and trench is quite different, as theprovision of an intermediate etch stop layer, such as the siliconnitride layer exhibiting a high k value, may unduly increase thepermittivity of the entire dielectric layer stack. To obtain a minimumpermittivity, the intermediate etch stop layer is commonly omitted.Consequently, the trench etch process may not be stopped by anintermediate etch stop layer, as typically materials having a high etchselectivity with respect to the low-k dielectric under consideration maynot provide the desired low permittivity characteristics.

With reference to FIGS. 1 a-1 c, the situation of a trench etch processperformed in a substantially homogeneous dielectric layer will bedescribed in more detail. FIG. 1 a schematically illustratescross-sectional views of a semiconductor device 100 comprising ametallization layer 150 after the trench etch process. The semiconductordevice 100 may comprise a substrate 101 in and over which may beprovided circuit elements (not shown), such as transistors and the like,which are electrically connected by one or more of the metallizationlayers 150. The substrate 101 may further comprise an etch stop layer102, which may be formed of any appropriate material that exhibitsdesired characteristics with respect to covering any buried regions,such as metal regions and the like, and to serve as an etch stop layerduring a via etch process for forming a via 151 in a dielectric materiallayer 152 of the metallization layer 150. The dielectric layer 152 maybe provided, at least over an extended height, as a substantiallyhomogeneous material, such as a low-k material, in order to obtain a lowoverall permittivity. Furthermore, a trench 153 is formed in an upperportion of the layer 152, wherein the trench 153 may have a depth 153Dthat, in combination with the respective trench width, is an importantfactor for determining the characteristics of the metallization layer150 with respect to reliability. That is, the conductivity, theelectromigration behavior and the like may be influenced by thethickness of the respective metal lines formed from the trench 153.Thus, the depth 153D may represent an important design measure foradjusting the operational behavior of the semiconductor device 100.

A typical process flow for forming the device 100 as shown in FIG. 1 amay comprise the following processes. After any circuit elements havebeen formed in and above the substrate 101, the etch stop layer 102 maybe deposited by any appropriate deposition technique, such as chemicalvapor deposition (CVD), spin-on techniques and the like. Thereafter, thedielectric layer 152 may be formed using any manufacturing technique asappropriate in view of material and process requirements. Next, an etchprocess may be performed, wherein, depending on the processrequirements, the via 151 may be formed first on the basis of anappropriate patterning regime. Subsequently, the trench 153 may beformed, wherein the surface topography may be suitably planarized priorto performing a corresponding patterning process for forming an etchmask for the trench 153. Thereafter, an etch process is performed on thebasis of a specified set of process parameters. Due to the homogeneousnature of the layer 152, the depth 153D may be controlled by adjustingthe etch time.

As is well-known, in complex manufacturing environments, a plurality ofetch chambers may be used for the various etch processes, whereinprocess fluctuations may occur, which may, however, directly translateinto respective depth fluctuations during the trench etch process.Moreover, even within a single etch chamber, the etch rate may varyslightly, even if the respective process parameters are maintained attheir target values. Consequently, an unwanted depth fluctuation may beobserved between substrates or lots of substrates after the trench etchprocess.

FIG. 1 b schematically illustrates the device 100 formed on a differentsubstrate, wherein the respective trench 153 has a depth 153A that isgreater than the target value 153D. FIG. 1 c schematically shows thedevice 100 formed above yet another substrate. In this case, therespective trench 153 may have a depth 153B that is less than the targetvalue 153D.

Consequently, the devices 100 according to FIG. 1 a-1 c at least mayhave a significantly differing operational behavior, wherein a certaindegree of fluctuation may even result in faulty devices.

It has therefore been proposed to introduce a material into the layer152, which may have different characteristics during an optical endpointdetection, while not unduly affecting the overall permittivity of layer152. Since a corresponding intermediate layer may be deposited duringthe formation of the layer 152 with a reduced degree of processnon-uniformity compared to the etch fluctuations described above,thereby allowing, in principle, an enhanced detectability of the end ofthe trench etch process, the high degree of similarity of the etchindicator material compared to the actual material of the layer 152,required for maintaining the overall permittivity at a low level, mayraise significant difficulties in detecting the intermediate etchindicator layer when the etch front releases respective atomic speciesinto the etch ambient. Thus, the resulting optical endpoint signal maynot be reliable.

In view of the situation described above, there exists a need for atechnique that enables the formation of trenches in materials in a morereliable manner, while avoiding or at least reducing the effects of oneor more of the problems identified above.

SUMMARY OF THE INVENTION

The following presents a simplified summary of the invention in order toprovide a basic understanding of some aspects of the invention. Thissummary is not an exhaustive overview of the invention. It is notintended to identify key or critical elements of the invention or todelineate the scope of the invention. Its sole purpose is to presentsome concepts in a simplified form as a prelude to the more detaileddescription that is discussed later.

Generally, the present disclosure is directed to a technique forpatterning material layers during the formation of microstructuredevices, such as integrated circuits and the like, wherein thepatterning process may be controlled in a more reliable manner byincorporating an appropriate etch control material, i.e., a materialthat may provide a reliable endpoint detection signal and/or provide areduced etch rate, into the respective material layer after theformation thereof. The incorporation of the respective etch controlmaterial after forming the material layer under consideration mayprovide enhanced process flexibility and controllability, since thecomposition of the etch control material may be selected on the basis ofdetectability in a subsequent etch process rather than in view ofcompatibility with the manufacturing process for forming the materiallayer under consideration. In one aspect, an implantation process may beused for introducing an appropriate etch control material into thematerial layer under consideration at a specified depth, wherein thedegree of influence on the remaining material layer may be maintained ata low level by, for instance, incorporating the etch control material ina laterally restricted area of the material layer and/or byincorporating a small concentration, which may nevertheless provide aprominent endpoint detection signal, since extremely distinctive speciesmay be incorporated by the implantation process. Furthermore, theimplantation process per se may exhibit an increased process uniformitywith respect to substrate-to-substrate uniformity compared to typicalfluctuations of etch processes so that the respective etch controlmaterial may be positioned with a significantly reduced degree ofsubstrate-to-substrate non-uniformity compared to etch processes,thereby providing the potential for increasing the overall processuniformity. In other aspects, an appropriate etch control material maybe incorporated at specified positions, for instance at via openings, inorder to release the respective etch control material in a subsequentpatterning process when forming respective openings or trenches aroundthe via opening. Since a corresponding material deposition process mayalso be performed with a reduced substrate-to-substrate non-uniformity,in total an increased controllability of the resulting etch process maybe achieved.

According to one illustrative embodiment disclosed herein, a methodcomprises implanting a specified etch control material into a materiallayer of a microstructure device to specify a target depth in thematerial layer. Thereafter, the material layer is patterned byperforming an etch process and the etch process is controlled on thebasis of the implanted etch control material.

According to another illustrative embodiment disclosed herein, a methodcomprises forming a material layer above a substrate of a microstructuredevice and forming an etch control material within a laterallyrestricted area of the material layer in order to specify apredetermined target depth in the material layer. Furthermore, themethod comprises performing an etch process for patterning the materiallayer while using the etch control material for controlling the etchprocess.

BRIEF DESCRIPTION OF THE DRAWINGS

The disclosure may be understood by reference to the followingdescription taken in conjunction with the accompanying drawings, inwhich like reference numerals identify like elements, and in which:

FIGS. 1 a-1 c schematically illustrate cross-sectional views of asemiconductor device having formed therein respective vias and trenchesof a metallization layer, which are formed according to a conventionalprocess technique in a dual damascene regime;

FIG. 2 a schematically illustrates a cross-sectional view of amicrostructure device receiving an etch control material in a previouslyformed dielectric layer in accordance with illustrative embodimentsdisclosed herein;

FIG. 2 b schematically illustrates a concentration distribution of theetch control material formed within the dielectric layer of the deviceas shown in FIG. 2 a;

FIGS. 2 c-2 d schematically illustrate cross-sectional views of themicrostructure of FIG. 2 a in further advanced manufacturing stages;

FIGS. 3 a-3 b schematically illustrate a microstructure device duringvarious manufacturing stages in patterning a dielectric layer accordingto a dual damascene regime using an implanted etch control materialaccording to other illustrative embodiments disclosed herein;

FIGS. 4 a-4 b schematically illustrate a microstructure device duringvarious manufacturing stages for patterning a material layer on thebasis of an etch stop layer formed locally within the material layeraccording to yet other illustrative embodiments disclosed herein;

FIGS. 5 a-5 c schematically illustrate cross-sectional views of asemiconductor device during patterning of a dielectric layer of ametallization level according to a dual damascene regime byincorporating an etch control material into respective via openingsprior to patterning respective trenches according to yet otherillustrative embodiments disclosed herein; and

FIGS. 6 a-6 b schematically illustrate cross-sectional views of asemiconductor device during the patterning of a semiconductor layer toreceive respective recesses adjacent to a gate electrode for formingtherein a strained semiconductor material according to furtherillustrative embodiments disclosed herein.

While the subject matter disclosed herein is susceptible to variousmodifications and alternative forms, specific embodiments thereof havebeen shown by way of example in the drawings and are herein described indetail. It should be understood, however, that the description herein ofspecific embodiments is not intended to limit the invention to theparticular forms disclosed, but on the contrary, the intention is tocover all modifications, equivalents, and alternatives falling withinthe spirit and scope of the invention as defined by the appended claims.

DETAILED DESCRIPTION OF THE INVENTION

Various illustrative embodiments of the invention are described below.In the interest of clarity, not all features of an actual implementationare described in this specification. It will of course be appreciatedthat in the development of any such actual embodiment, numerousimplementation-specific decisions must be made to achieve thedevelopers' specific goals, such as compliance with system-related andbusiness-related constraints, which will vary from one implementation toanother. Moreover, it will be appreciated that such a development effortmight be complex and time-consuming, but would nevertheless be a routineundertaking for those of ordinary skill in the art having the benefit ofthis disclosure.

The present subject matter will now be described with reference to theattached figures. Various structures, systems and devices areschematically depicted in the drawings for purposes of explanation onlyand so as to not obscure the present disclosure with details that arewell known to those skilled in the art. Nevertheless, the attacheddrawings are included to describe and explain illustrative examples ofthe present disclosure. The words and phrases used herein should beunderstood and interpreted to have a meaning consistent with theunderstanding of those words and phrases by those skilled in therelevant art. No special definition of a term or phrase, i.e., adefinition that is different from the ordinary and customary meaning asunderstood by those skilled in the art, is intended to be implied byconsistent usage of the term or phrase herein. To the extent that a termor phrase is intended to have a special meaning, i.e., a meaning otherthan that understood by skilled artisans, such a special definition willbe expressly set forth in the specification in a definitional mannerthat directly and unequivocally provides the special definition for theterm or phrase.

Generally, the subject matter disclosed herein relates to the patterningof material layers required during the manufacturing sequence forforming microstructures, such as integrated circuits and the like. Insome manufacturing stages for advanced microstructures, it may benecessary to etch material layers, such as dielectric layers,semiconductor layers, metal layers and the like, wherein thecorresponding etch process has to be stopped within the material layerat a specified target depth. As previously explained, complex etchprocesses depend on a plurality of process parameters and other ambientconditions, such as the status of the process chamber and the like, sothat different etch rates may be encountered even if the processparameters, such as plasma power, flow rates of reactive gases andcarrier gases, pressure, substrate temperature and the like, aremaintained within precisely defined process margins. Consequently,during the processing of a plurality of substrates, respective depthfluctuations may occur which may negatively influence the furtherprocessing of the device and/or the operational behavior thereof, as ispreviously explained. In many cases, the provision of an intermediateetch stop layer may not be tolerable due to a significant interactionwith the remaining material of the layer under consideration, forinstance with respect to a significant increase of the relativepermittivity thereof. However, providing a similar material, which maypotentially be detected during the etch process on the basis of anyreleased species, may suffer from a non-reliable detectability, or mayalso cause a significant alteration of the overall materialcharacteristics, since a significant concentration may be required.Consequently, according to the present disclosure, a technique iscontemplated in which an efficient etch control material may beincorporated after forming the material layer under consideration,wherein a low degree of influence on the overall materialcharacteristics may be maintained, while nevertheless an efficientcontrol of the etch process may be accomplished, while a high degree ofcompatibility with a well-established process flow may also bemaintained, for instance with respect to avoiding additionalphotolithography steps and the like.

In some illustrative embodiments, a low degree of impact on the materialcharacteristics of the layer to be patterned may be achieved by using animplantation process for incorporating an appropriate implantationspecies, which may provide a high distinctive endpoint detection signaland/or which may even provide a certain degree of etch stopcharacteristics. For this purpose, in some illustrative embodiments, arespective implantation species may be incorporated into the materiallayer under consideration at a moderately low concentration so as tomaintain the influence on the overall material characteristics at adesired low level. In other cases, the respective implantation speciesmay be incorporated in a laterally restricted manner, for instance onthe basis of an etch mask to be used for patterning the material layerunder consideration, thereby allowing the incorporation of increasedconcentrations and providing enhanced reliability in the creation of arespective endpoint detection signal and/or enabling a locallyrestricted material modification so as to appropriately change the etchcharacteristics at a respective predetermined depth. In other cases, anappropriate etch control material may be incorporated in the materiallayer under consideration at an intermediate manufacturing stage duringthe patterning of the material layer, wherein the process ofincorporating the corresponding etch control material may be based onhighly controllable process parameters with a reduced degree of processvariation from substrate to substrate compared to etch-relatednon-uniformities, as are previously discussed.

It should be appreciated that the subject matter disclosed herein ishighly advantageous in the context of patterning dielectric materials,such as low-k dielectric materials, in metallization layers of advancedsemiconductor devices, since here trenches may have to be formed on thebasis of a substantially homogeneous dielectric material, thecharacteristics of which may not be significantly altered in view of theoperational behavior of the respective metal lines and vias. Theprinciples of the present invention may, however, also be applied toother situations in which an opening has to be formed in respectivematerial layers down to a specified target depth, wherein the previousformation of an etch stop layer may not be compatible with the processflow and/or the material characteristics. For instance, in advancedfield effect transistors, frequently a strained semiconductor materialmay be incorporated into respective transistor areas, such as the drainand source regions, in order to provide a desired high strain in thechannel region of the device. For this purpose, in some frequently usedapproaches, a corresponding recess is formed in the active region,wherein the depth and the size of the recess may substantiallydetermine, in combination with the type of material epitaxially grown inthe corresponding recesses, the finally obtained strain in the channelregion. Since conventionally the etch process for forming the recessesmay not be controlled by an etch stop layer, substrate-to-substrateuniformity of the corresponding etch process may rely on the uniformityof the etch process and may therefore be subject to correspondingfluctuations, as previously explained. Also, in this case, a respectiveetch control material may be efficiently used for increasing thecontrollability and thus uniformity of the corresponding cavity etchprocess. Consequently, unless specifically set forth in thespecification and the appended claims, the present invention should notbe construed as being restricted to the patterning of dielectric layersof metallization levels in advanced semiconductor devices.

FIG. 2 a schematically illustrates a cross-sectional view of amicrostructure device 200, which, in one illustrative embodiment, mayrepresent an advanced semiconductor device including a plurality ofcircuit elements (not shown) having critical dimensions of 100 nm andsignificantly less, or even 50 nm and less. The device 200 may comprisea substrate 201, which may represent any appropriate carrier materialfor forming thereon and therein respective features, such as circuitelements, micromechanical devices, opto-electronic devices and the like.For convenience, any such components are not shown in FIG. 2 a. In someillustrative embodiments, the substrate 201 may represent the substratefor an advanced semiconductor device and may therefore represent asilicon-based material, a silicon-on-insulator (SOI) substrate and thelike. The device 200 may further comprise a material layer 250 formedabove the substrate 201, which may have to be patterned in accordancewith process and device requirements. In one illustrative embodiment,the material layer 250 may represent, in this manufacturing stage, thedielectric material of a metallization layer of an advancedsemiconductor device. In this case, the material layer 250 may becomprised of any appropriate dielectric material, wherein, insophisticated applications, the material characteristics may besubstantially homogeneously provided across a significant portion of theentire thickness of the material layer 250. It should be appreciatedthat the material layer 250 may represent a layer stack includingadditional components, such as an etch stop layer, a capping layer andthe like, as required for the further processing and for adjustingdevice characteristics. For convenience, any such additional layers arenot shown in FIG. 2 a. It should be appreciated, however, that at leasta significant portion of the material layer 250 may have substantiallyhomogeneous characteristics, at least at a target depth range to whichan opening is to be formed in the material layer 250 in a subsequentpatterning process.

The microstructure device 200 as shown in FIG. 2 a may be formed on thebasis of any appropriate process technique, as is also, for instance,described with reference to the semiconductor device 100, when thematerial layer 250 is to represent a metallization layer. In othercases, any other appropriate process techniques may be employed forforming respective microstructure components in and above the substrate201, followed by any appropriate deposition technique for forming thematerial layer 250, which may include different types of depositiontechniques, such as chemical vapor deposition (CVD), physical vapordeposition (PVD), electroless plating, electroplating, combinationsthereof and the like. Moreover, sophisticated planarization techniquesmay also be used for forming the material layer 250, if required.Thereafter, according to one illustrative embodiment, an implantationprocess 260 may be performed in order to introduce an appropriateimplantation species 261 at a specific depth 262 of the layer 250. Inone illustrative embodiment, the implantation process 260 may beperformed on the basis of process parameters, such as implantation dose,so as to create a moderately low concentration at the desired depth 262in order to maintain any interaction of the implantation species 261during and after the implantation process 260 with the material of thelayer 250 at a low level. For instance, a moderately low implantationdose of approximately 10¹¹-10¹⁵ ions/cm² may be used in combination withan appropriate implantation energy in order to position the respectiveimplantation species 261 at the desired depth 262.

It is well known that a large number of species may be processed inavailable implantation tools, for instance on the basis of appropriateprecursor materials, such as gaseous components, which may beappropriately ionized and accelerated to form an appropriate ion beamwith relatively high uniformity. For instance, the implantation energymay be controlled with high precision on the basis of beam opticsincluding magnets and the like so that the associated averagepenetration depth may be adjusted with high uniformity for a pluralityof substrates, as long as the material characteristics of the layer 250for the plurality of substrates are within respective processtolerances. In this respect, it should be appreciated that, forinstance, a substrate-to-substrate fluctuation in layer thickness of thematerial layer 250 may be less critical compared to etchnon-uniformities, since the corresponding penetration depth may not besubstantially affected. That is, the averaged penetration depth 262 forthe implantation species 261 under consideration may remainsubstantially the same so that a corresponding depth of a respectivetrench formed on the basis of the species 261 may remain substantiallyunchanged. Consequently, due to the reduced substrate-to-substratenon-uniformity of the implantation process 260, the implantation species261 may be positioned at the predetermined depth 262 with acorresponding high uniformity for a plurality of substrates, therebyproviding an efficient means for obtaining a reliable controlinformation for a subsequent etch process. Due to the availability of awide class of implantation species, suitable materials may be selectedwhich provide a highly distinctive endpoint detection signal during asubsequent etch process. Thus, “exotic” candidates may be selected,which may provide a well-detectable signal, even if provided with a lowconcentration. In this way, the overall material characteristics of thelayer 250 may be substantially maintained, while nevertheless a highdegree of controllability may be achieved. For example, appropriateatomic species providing a well-detectable, that is, distinctiveemission wavelength when ionized in a plasma ambient of an etchatmosphere may be selected as the implantation species 261. In this way,a corresponding optical endpoint detection system may be adjusted to thecorresponding emission wavelength without significant noise orinterference from other components that are also released or presentduring the respective etch process.

FIG. 2 b schematically illustrates a typical distribution of theconcentration of the implantation species 261, indicated as curve 261C,with respect to the depth direction, indicated as 263, of the materiallayer 250. As is schematically illustrated in FIG. 2 b, a respectivemaximum 261M of the curve 261C may be located at a desired depth, inthis case the depth 262, wherein, in some illustrative embodiments, thedesired depth 262 may represent a target depth of an opening to beformed in the layer 250. It should be appreciated, however, that thedepth 262 may not actually represent the target depth of a trench or anopening but may provide an indication thereof. For instance, upondetecting any appropriate point of the distribution 261C shown in FIG. 2b, for instance the maximum value 261M, the corresponding etch processmay not necessarily be stopped but may be continued for a defined timeperiod if required. Moreover, as indicated in FIG. 2 b, the distribution261C of the implantation species 261 may be centered around the desireddepth 262, wherein the “width” of the corresponding distribution 261Cmay depend on the material characteristics of the layer 250, theimplantation species to be incorporated, the desired depth 262 and thelike. Although a reduced width of the distribution may be desirable withrespect to control efficiency and reduced interaction with the materialof the layer 250, a more or less increased width of the implantationprofile may nevertheless allow a precise detection of a respectiveendpoint detection signal as long as the pronounced maximum 261M may beprovided, since then the point of the maximum intensity of therespective endpoint detection signal may be used as the actual controlinformation of the implantation profile as shown in FIG. 2 b.

FIG. 2 c schematically illustrates the microstructure device 200 in afurther advanced manufacturing stage, wherein an etch mask 264 is formedabove the material layer 250, which may define the lateral borders of anopening to be formed in the material layer 250 to a desired targetdepth, such as the depth 262, if an etch process 265 is to besubstantially stopped at the maximum concentration 261M as shown in FIG.2 b. The etch mask 264 may be provided in the form of any appropriatematerial, such as a resist material, a hard mask or any combinationthereof, wherein the mask 264 may also comprise an appropriateantireflective coating (ARC) material, if required, for patterning themask 264 by advanced lithography techniques.

FIG. 2 d schematically illustrates the microstructure device 200 in afurther advanced stage of the etch process 265, wherein an opening 253is formed in the upper portion of the layer 250, wherein the etch frontmay already contact the implantation species, thereby increasinglyreleasing respective atomic or molecular species 261R, which may lead toa corresponding emission of radiation 266, which in turn may be detectedby a corresponding optical endpoint detection system 267. The system 267may be adapted to determine a maximum intensity of the correspondingradiation 266, i.e., of a specified wavelength range, in order to give areliable indication for controlling the etch process 265. For instance,as previously explained, upon detecting a maximum intensity of theradiation 266, the etch process 265 may be stopped or may be continuedfor a predefined short time period. Thus, even if a different etch ratemay occur during the etch process 265 in different substrates due tosubstrate-to-substrate fluctuations, such etch process relatednon-uniformities may be significantly reduced due to the provision ofthe implantation species 261, since the implantation process 260 (FIG. 2a) may have per se an increased substrate-to-substrate uniformity, whilethe corresponding endpoint detection signal, for instance provided byradiation 266, may be detected and evaluated with high precision, evenif moderately low concentrations are incorporated so as to reduce anynegative impact of the implantation species 261 on the material layer250. Moreover, since moderately low implant concentrations aresufficient for efficiently controlling the etch process 265,implantation-induced damage of the material layer 250, which maypossibly change the material characteristics of the upper portion of thelayer 250, may be maintained at a very low level.

In some illustrative embodiments, the ion bombardment during theimplantation process 260 may be intentionally raised to a specifiedlevel in order to positively change the material characteristics, forinstance with respect to increasing the porosity and thus reducing thepermittivity, enhancing the out-gassing behavior and the like. Forinstance, the implantation process 260 may be performed prior toperforming a respective heat treatment in order to remove unwantedcomponents from the layer 250 by exposing the device 200 to a vacuumambient at elevated temperatures for removing any nitrogen radicals andthe like, for reducing resist poisoning effects and the like. In othercases, a moderately high ion bombardment may reduce the relativepermittivity due to the formation of micro cracks, and the like.

Consequently, the incorporation of the implant species 261 may provideenhanced controllability of the patterning of the material layer 250,wherein, in some illustrative embodiments, low-k dielectric materials ofadvanced semiconductor devices may be efficiently patterned withincreased depth control for respective metal line trenches, wherein theselection of the implant species may allow the use of a wide class ofetch control materials.

With reference to FIGS. 3 a-3 b, further illustrative embodiments willnow be described in which an appropriate implantation species will beincorporated in a laterally restricted area. FIG. 3 a schematicallyillustrates a microstructure device 300, which may comprise a substrate301 and a material layer 350 to be patterned in accordance with devicerequirements. With respect to the microstructure device 300 and thesubstrate 301, the same criteria apply as previously explained withreference to the devices 100 and 200. In the illustrative embodimentsshown, the microstructure device 300 may represent a semiconductordevice, wherein in and on the substrate 301 may be provided a pluralityof circuit elements, such as transistors, capacitors and the like (notshown). The respective circuit elements may be electrically connected byone or more metallization layers, wherein the material layer 350 mayrepresent one of these metallization layers and may therefore comprise adielectric material 352, which may include any appropriate materialcomposition to provide the desired characteristics. For instance, thedielectric material 352 may comprise, at least across a significantdepth thereof, a low-k dielectric material. Furthermore, the dielectricmaterial 352 may be formed on an etch stop or barrier layer 302, whichmay be comprised of any appropriate etch stop and barrier material, suchas silicon nitride, silicon carbide, nitrogen-enriched silicon carbideand the like. Furthermore, a via opening 351 may be formed through thedielectric material 352 down to the etch stop layer 302, wherein, inthis manufacturing stage, the via opening 351 may be filled with anappropriate fill material 303, which, in some embodiments, may also forman appropriate layer 303A that may provide a substantially planarsurface topography and may also provide ARC characteristics for forminga mask 364 on the basis of photolithography techniques. For instance,the fill material 303 may be comprised of any appropriate polymermaterial, resist material and the like.

The microstructure device 300 as shown in FIG. 3 a may be formed on thebasis of well-established techniques as previously described, whereinthe dielectric material 352 of the metallization layer 350 may be formedon the basis of any appropriate deposition technique followed bywell-established lithography processes for defining the via opening 351in the material 352, wherein a corresponding etch process may bereliably stopped on the basis of the etch stop layer 302. It should beappreciated, however, that the via opening 351 may not necessarily beformed in this manufacturing stage and may instead be formed afterpatterning a respective trench in an upper portion of the material 352according to a well-established “trench first-via last” approach.Thereafter, the fill material 303 may be provided by any appropriatedeposition technique, such as spin-on, CVD and the like, depending onthe type of material to be deposited. If required, additionalplanarization techniques may be used for further enhancing the surfacetopography and adapting the layer thickness of the material 303A. In atypical trench first-via last approach, the layer 303A may represent anyappropriate ARC or hard mask layer required for the subsequentpatterning of the material 352. Next, well-established lithographytechniques may be used to pattern a resist material in order to form themask 364. In the embodiment illustrated, the mask 364 may have anopening 364A, which substantially defines the lateral dimensions of arespective trench to be formed in an upper portion of the material 352.In the embodiment shown, the mask 364 may additionally be used as animplantation mask during an implantation process 360 for introducing anappropriate implantation species 361 to a specified depth 362, as ispreviously described with respect to the implantation process 260.Consequently, in this case, the implantation species 361 is laterallyrestricted substantially to an area at which a respective trench is tobe formed, thereby not substantially affecting the remaining material352. Consequently, the respective concentration of the implantationspecies 361 may be selected in view of reliability of controlling asubsequent etch process, while the interaction with the material of thelayer 352 may be less critical. For instance, the specified depth 362,that is, the point of the maximum concentration, may not exactlycorrespond to the target depth of the trench under consideration but mayrequire a minor “over-etch time” upon reaching the maximumconcentration, thereby removing the essential amount of the implantationspecies 361. Hence, any interaction with the material of the layer 352may further be reduced. Consequently, during the implantation process360, a high degree of flexibility in selecting the type of implantationspecies as well as the resulting concentration may be provided.

It should be appreciated that typically the ion blocking characteristicsof the mask 364 may substantially prevent the penetration of coveredportions of the layer 352. In other illustrative embodiments, theimplantation process 360 may be performed at an intermediate stage ofthe subsequent etch process, i.e., after opening the layer 303A, therebyproviding an even increased relative ion blocking behavior of thecombined mask 364 and the patterned layer 303A, since the correspondingimplantation energy and thus the averaged penetration depth may beselected to be less compared to the implantation through the layer 303A.Consequently, the incorporation of the implant species 361 in lateralportions of the layer 352, which are covered by the mask 364 may beeffectively suppressed or at least be significantly reduced. It is to benoted that a different mechanism for stopping implanted ions of thespecies 361 in the fill material 303 compared to the material 352 maynot significantly affect the efficiency of the implantation species 361provided at the desired depth 361 for acting as an etch controlmaterial. For instance, if the fill material 303 may provide anincreased stopping efficiency, the respective implantation species 361may be positioned around a reduced depth 362A, while in the other casewhen the material 303 may stop the penetrating implantation species 361less efficiently, an increased depth 362B may result. Since the fractionof implantation species 361 positioned within the via opening 351, i.e.,within the fill material 303, is significantly less compared to thespecies 361 positioned at the desired depth 362, the correspondingmaximum concentration may nevertheless be detected with highreliability. In other cases, when the respective via opening 351 has notyet been formed according to the “trench first-via last” approach, asubstantially uniform depth 362 may be obtained during the implantationprocess 360.

FIG. 3 b schematically illustrates the microstructure device 300 whensubjected to an etch process 365 in order to form a respective opening353 in the upper portion of the material layer 352. As previouslyexplained, when the etch front of the process 365 approaches theconcentration distribution centered around the specified depth 362,increasingly atomic or molecular species 361 may be released into theetch atmosphere and may radiate at a prominent emission wavelength 366,which may be reliably detected, as is previously explained. It should beappreciated that in some illustrative embodiments whenimplantation-induced damage of the mask 364 caused by the precedingimplantation process 360 may not be negligible, an appropriate dose andimplantation time may be selected so as to obtain, on the one hand, adesired high concentration of the species 361, while neverthelessmaintaining the resulting implantation damage in the etch mask 364 at anappropriate level. In other illustrative embodiments, the layer 303A maybe patterned prior to the implantation process 360 and may providesufficient etch selectivity during the process 365, whereinimplantation-induced damage in the patterned layer 303A may besubstantially avoided in the process 360, thereby providing a high etchfidelity during the etch process 365, irrespective of the implantationparameters of the process 360.

Consequently, the process strategy described above provides a highdegree of flexibility in selecting an appropriate implantation speciesas well as a concentration thereof, thereby even further enhancing thereliability of the etch control, while any interaction of theimplantation species with the base material of the layer 352 may besignificantly reduced or be even completely avoided.

With reference to FIGS. 4 a-4 b, further illustrative embodiments willnow be described in which a moderately high concentration of arespective implantation species is introduced into the material layer tobe patterned in a laterally restricted manner, as described above,wherein additionally the moderately high concentration may be used tosignificantly locally alter the material characteristics to provide acertain degree of etch stop effect.

FIG. 4 a schematically illustrates a microstructure device 400comprising a substrate 401 above which may be formed a material layer450 that is to be patterned. Moreover, a mask 464 may be formed abovethe layer 450, wherein, if required, an appropriate ARC material or hardmask material 403 may be provided, which may be used for patterning thelayer 450, when implantation-induced damage of the mask 464 may requirethe removal of the mask 464 prior to the actual patterning process. Forinstance, the ARC layer or hard mask layer 403 may be comprised of anyappropriate material, such as silicon oxynitride, silicon dioxide,silicon nitride, silicon carbide, oxygen-enriched silicon carbide,combinations thereof and the like. With respect to the other componentsof the device 400, the same criteria apply as previously described withrespect to the devices 100, 200 and 300. Hence, a further description ofthese components as well as a process flow for forming the same will beomitted here.

Furthermore, the device 400 is subjected to an ion implantation process460 for introducing a species 461 to a desired depth 462, wherein thetype and concentration of the respective species 461 may be selected,additionally or alternatively, to provide a distinctive endpointdetection signal, so as to significantly alter the materialcharacteristics of the layer 450 at the desired depth 462. For example,nitrogen, carbon or other components may be introduced with a moderatelyhigh concentration so as to significantly affect the etch rate during asubsequent etch process. For instance, a moderately high nitrogenconcentration, for instance in a range of 10¹⁹-10²² atoms/cm³, may beintroduced on the basis of the implantation process 460. Due to themoderately high implantation dose values required for obtaining theconcentration, additionally respective high implantation-induced damagemay be created in the upper portion of the layer 450 down to thespecified depth 462, thereby also affecting the etch rate in asubsequent etch process. Thus, due to the ion bombardment, the etch ratemay be increased in the upper portion, while due to the species 461, asignificant etch stop effect may be obtained at the desired depth 462.If the implantation-induced damage in the resist mask 464 may alsoresult in a corresponding corrosion of the resist material, in someillustrative embodiments, the resist material 464 may be removed priorto the actual patterning process, which may then be performed on thebasis of the mask 403.

FIG. 4 b schematically illustrates the device 400 during a patterningprocess 465, wherein the resist material 464 may have been removed, aspreviously explained. In other illustrative embodiments, the process 465may also be performed on the basis of the resist mask 464. Consequently,when the etch front approaches the specified depth 462, the etch ratemay become increasingly lower, thereby equalizing the etch rate acrossthe entire substrate 401. Moreover, the species 461 may be increasinglyreleased into the etch atmosphere and may be detected on the basis ofoptical endpoint systems, as previously explained. It should beappreciated that, in some illustrative embodiments, an additional“indicator” material may be introduced, for example, in a moderately lowconcentration in view of cycle time, in a further implantation process,when the “etch stop” species may not provide a desired distinctiveemission radiation during the etch process. Consequently, due to thesignificantly reduced etch rate at the specified depth 462, thesubstrate-to-substrate uniformity may be significantly increased, as isthe case in the previous embodiments, while additionally an enhancedacross-substrate uniformity may be achieved due to the etch stop effectof the implanted species 461. Furthermore, due to the lateralrestriction of the implantation species 461, the overall materialcharacteristics of the layer 450 may not be substantially affected.

With reference to FIGS. 5 a-5 b, further illustrative embodiments willnow be described, wherein an etch stop material or “indicator” materialmay be provided in a via opening prior to patterning a trench, whereinthe indicator material may provide an efficient endpoint detectionsignal.

FIG. 5 a schematically illustrates a microstructure device 500comprising a substrate 501, above which is formed a material layer 550to be patterned so as to receive a via opening and a trench openingaccording to a typical “via first-trench last” approach in the dualdamascene regime. Furthermore, an etch stop layer 502 may be providedbetween the substrate 501 and the layer 550. With respect to thesecomponents, the same criteria apply as previously explained.Furthermore, in this manufacturing stage, the layer 550 may comprise avia opening 551, which may have formed therein an indicator or etchcontrol material 561 filled up to a height so as to specify a depth 562.The material 561 may represent any appropriate material that may bedeposited in an appropriate manner so as to allow the partial filling ofthe via opening 551 as shown. Moreover, the material 561 may comprise aspecified component or species, such as a metal and the like, which mayallow reliable detection during a subsequent process when released intothe etch ambient. In other cases, the material 561 may lack acorresponding component and this component may be added to a furthermaterial to be formed above the material 561, as is described withreference to FIG. 5 b.

The material 561 may be provided on the basis of any appropriatedeposition technique, such as a spin-on process, wherein a definedamount of material may be deposited and may be distributed across thesubstrate 501, wherein, due to the low viscosity state, reliable fillingof the via opening 551 may be accomplished. In some cases, additionaltreatments may be performed, for instance heating the substrate 501, soas to ensure reliable filling of the lower part of the via opening 551.Thereafter, the material 561 may be cured and a surface cleaning processmay be performed in order to remove residues of the material 561 fromexposed surface portions of the layer 550. Thereafter, a further fillmaterial may be provided, which may be complementary to the material 561with respect to a corresponding etch control material, as is previouslyexplained. That is, if the material 561 comprises a respective componentemitting a distinctive emission wavelength, the subsequent fill materialmay be substantially devoid of any such material, and vice versa.

FIG. 5 b schematically illustrates the device 500 in a further advancedmanufacturing stage. A second fill material 503 may be formed in anupper portion of the via opening 551 and may also define a respectivelayer 503A for providing a substantially planar surface topography. Aspreviously explained, the material 503 may additionally provide thedesired ARC effect. Moreover, a resist mask 564 may be formed above thelayer 503A and may have formed therein a respective opening 564A, whichsubstantially defines the lateral dimensions of a trench to be formed inan upper portion of the layer 550. The material 503 and the layer 503Amay be formed on the basis of well-established techniques, such asdeposition by spin-coating and the like, as is well known in the art.Furthermore, the resist mask 564 may be manufactured on the basis ofwell-established photolithography techniques. Moreover, the device 500may be subjected to an anisotropic etch process 565, whereinwell-established etch recipes may be used. During the advance of therespective etch front, an interface 561S between the material 503 and561 may result in a corresponding change of the composition of thegaseous ambient due to an increased release of an indicator material ordue to an abrupt stop of release of an indicator material, depending onwhether the respective material is provided in the material 503 or 561.It should be appreciated that the effective area of the interface 561Sis relatively small compared to the entire area to be etched during theprocess 561, i.e., the corresponding trench bottom area is significantlylarger than any vias formed in the respective trench, which may,however, nevertheless provide a reliable endpoint detection signal,since any appropriate exotic component may be provided with asufficiently high concentration.

Since the etch rate in the material 503 may not necessarily be the sameas the etch rate in the material of the layer 550, the correspondingspecified depth 562 may be selected such that a correspondingcorrelation between the different etch rates may be taken intoconsideration. For instance, if the etch rate in the material 503 ishigher compared to the etch rate in the layer 550, the respective depth562 may be selected greater than a target depth of the correspondingtrench to be etched in the upper portion of the material 550. Similarly,when the etch rate is lower, the corresponding specified depth 562 maybe selected smaller compared to the actual target depth of the trench tobe formed. This latter case is schematically illustrated in FIG. 5 b,wherein the specified depth 562 is less than the target depth 562Arequired in the material of the layer 550.

FIG. 5 c schematically illustrates the device 500 in a further advancedmanufacturing stage. Here, the etch front within the material 561 mayhave reached the interface 561S, thereby releasing the correspondingspecies into the etch ambient or stopping a release of etch controlmaterial when provided in the material 503, which may be reliablydetected, even though the overall area of the interface 561S mayrepresent only a small fraction of the total etched area. For theexample described above, i.e., a higher etch rate of the material 550,the etch front may have reached the desired target depth 562A in thelayer 550 when the interface 561S is reached. It should be appreciatedthat a corresponding correlation between the respective etch rates inthe materials 503 and 550 may be readily established in advance on thebasis of respective test runs and like.

Consequently, a high degree of etch controllability may be accomplishedwhile at the same time a high degree of compatibility with conventionalvia first-trench last approaches may be achieved. Moreover, any negativeinteraction of the etch control material with the layer 550 may beavoided or at least be significantly suppressed.

With reference to FIGS. 6 a-6 b, further illustrative embodiments willnow be described in which an enhanced etch control for an etch processfor recessing a semiconductor region may be accomplished. Asemiconductor device 600 may comprise a substrate 601, above which maybe formed a semiconductor layer 605, which may, for instance, representa silicon-based material. Furthermore, a circuit feature, such as afield effect transistor 610, may be provided above the semiconductorlayer 605 in an early manufacturing stage. In this phase, the circuitelement 610 may comprise a gate electrode 611 formed above thesemiconductor layer 605 and separated therefrom by a gate insulationlayer 612. Furthermore, the gate electrode 611 may be encapsulated by acapping layer 613 and a respective sidewall spacer 614. For instance,the spacer 614 and the capping layer 613 may be comprised of anyappropriate dielectric material, such as silicon nitride, silicondioxide and the like, which may act as an efficient etch and epitaxialgrowth mask during the subsequent processing of the device 600. As iswell known, strain in a channel region 615 of the field effecttransistor 610 may efficiently modify the charge carrier mobility, whichprovides an efficient means for increasing the overall performance offield effect transistors. In some approaches, therefore, a strainedsemiconductor material is formed adjacent to the channel region 615 byforming a respective recess and epitaxially growing therein a strainedsemiconductor material, such as silicon/germanium, silicon/carbon andthe like, depending on the type of strain required in the channel region615. During the respective etch process for forming the recess, anincreased controllability may therefore significantly enhance theoverall process uniformity and thus the uniformity of the respectiveperformance gain of the device 610. Consequently, according to thesubject matter disclosed herein, an implantation process 660 may beperformed to incorporate a specified implantation species 661 at aspecified depth 662. With respect to the characteristics of theimplantation process 660, the same criteria apply as previouslyexplained.

FIG. 6 b schematically illustrates the device 600 in a further advancedmanufacturing stage, wherein the device 600 is exposed to an etchprocess 665 for forming respective cavities 667 adjacent to the channelregion 615. During the etch process 665, the etch front moves towardsthe etch control material 661, components of which may be released intothe etch atmosphere and may be detected by a corresponding opticalendpoint detection system, as previously explained. Consequently,substrate-to-substrate uniformity may be efficiently increased, as ispreviously described.

In other illustrative embodiments, the implantation species 661 may beselected such that the etch behavior of the semiconductor layer 605 maybe significantly changed locally in order to provide a certain degree ofetch stop behavior. For instance, during the implantation process 660,oxygen may be incorporated into the semiconductor layer 605 whencomprising, for instance, a significant amount of silicon. Thereafter, aheat treatment may be performed so as to locally form silicon dioxide atthe specified depth 662, which may act as an efficient etch indicatorand/or etch stop layer during the process 665. Consequently, even anincreased across-substrate uniformity of the etch process 665 may beobtained due to the etch stop characteristics of the species 661. Itshould be appreciated that respective implantation processes forintroducing a high concentration of oxygen are well established in theart and may be used for the process 660.

As a result, the subject matter disclosed herein enables theincorporation of an etch control material into material layers to bepatterned after the formation of the layer, wherein an interaction ofthe etch control material with the material layer may be maintained at alow level, or may be substantially avoided, while nevertheless providinga pronounced endpoint detection signal. In some illustrativeembodiments, the respective etch control material may be incorporated ina laterally restricted manner, thereby even further reducing anyinteraction with the remaining material. In illustrative embodiments,the etch control material may be incorporated by ion implantation,thereby providing a high degree of process uniformity and flexibility ofselecting the etch control material, since a wide class of materials maybe processed in presently available implant tools, thereby allowing theselection of even very “exotic” candidates.

The particular embodiments disclosed above are illustrative only, as theinvention may be modified and practiced in different but equivalentmanners apparent to those skilled in the art having the benefit of theteachings herein. For example, the process steps set forth above may beperformed in a different order. Furthermore, no limitations are intendedto the details of construction or design herein shown, other than asdescribed in the claims below. It is therefore evident that theparticular embodiments disclosed above may be altered or modified andall such variations are considered within the scope and spirit of theinvention. Accordingly, the protection sought herein is as set forth inthe claims below.

1. A method, comprising: implanting a specified etch control materialinto a material layer of a microstructure device to specify a targetdepth in said material layer; forming an etch mask above said materiallayer after implanting said specified etch control material; patterningsaid material layer on the basis of said etch mask by performing an etchprocess; and controlling said etch process on the basis of detectingsaid implanted etch control material released during said etch process.2. The method of claim 1, wherein said material layer represents a low-kdielectric layer of a metallization layer of said microstructure device.3. The method of claim 2, wherein patterning said material layercomprises forming a trench in an upper portion of said low-k dielectriclayer.
 4. The method of claim 1, wherein controlling said etch processcomprises detecting a release of at least one component of said etchcontrol material by optical spectral analysis.
 5. The method of claim 1,wherein implanting said specified etch control material comprisespositioning a concentration maximum of said etch control material atsaid target depth.
 6. The method of claim 1, wherein said specified etchcontrol material changes an etch rate of said material layer, saidchange in said etch rate providing an etch stop effect during said etchprocess.
 7. The method of claim 1, wherein said material layerrepresents a semiconductor material receiving a trench for forming astrained semiconductor material in said trench.
 8. A method, comprising:forming a material layer above a substrate of a microstructure device;forming an etch control material within a laterally restricted area ofsaid material layer to specify a predetermined target depth in saidmaterial layer; and performing an etch process for patterning saidmaterial layer while using said etch control material for controllingsaid etch process by detecting said etch control material releasedduring said etch process.
 9. The method of claim 8, wherein forming saidetch control material comprises forming a mask to define said laterallyrestricted area.
 10. The method of claim 9, wherein said etch controlmaterial is formed by implanting an implantation species.
 11. The methodof claim 10, wherein said implantation species is selected to provide adistinctive signal in an optical spectral analysis technique.
 12. Themethod of claim 10, wherein said implantation species changes an etchrate of said material layer, said change in said etch rate providing anetch stop effect during said etch process.
 13. The method of claim 9,further comprising using said mask to form a first opening andintroducing said etch control material into said first opening tocontrol said etch process for forming a second opening enclosing saidfirst opening.
 14. The method of claim 13, wherein introducing said etchcontrol material comprises partially filling said first opening with afirst fill material and filling a remaining portion of said firstopening with a second fill material, said first and second fillmaterials having a different material composition.
 15. A method,comprising: providing a substrate having formed thereon a dielectriclayer of a microstructure device; and forming an etch control materialwithin said dielectric layer, said etch control material positioned tospecify a target depth for patterning said dielectric layer.
 16. Themethod of claim 15, further comprising etching said dielectric layer andusing an endpoint signal obtained on the basis of said etch controlmaterial for controlling an etch depth according to said predeterminedtarget depth.
 17. The method of claim 15, wherein said etch controlmaterial is formed within said dielectric layer by ion implantation. 18.A method, comprising: implanting a specified etch control material intoa material layer of a microstructure device, wherein said specified etchcontrol material provides a change in an etch rate of said materiallayer, said change in said etch rate providing an etch stop effectduring an etch process; patterning said material layer by performing anetch process; and controlling an etch depth of said etch process on thebasis of said change in said etch rate of said material layer duringsaid etch process.
 19. The method of claim 18, further comprisingadditionally controlling said etch process on the basis of detectingsaid implanted etch control material released during said etch process.20. The method of claim 19, wherein additionally controlling said etchprocess comprises detecting a release of at least one component of saidetch control material by optical spectral analysis.
 21. The method ofclaim 18, wherein implanting said specified etch control materialcomprises positioning a concentration maximum of said etch controlmaterial at a target depth in said material layer.
 22. The method ofclaim 18, further comprising forming an etch mask above said materiallayer and patterning said material layer on the basis of said etch mask.23. The method of claim 22, wherein said specified etch control materialis implanted after forming said etch mask, said etch mask acting as animplantation mask.